Keynotes


Migratable Objects: The evolution and journey of an idea

Migratable Objects: The evolution and journey of an idea

by Laxmikant (Sanjay) Kale

Paul and Cynthia Saylor Professor Emeritus of Computer Science | Parallel Programming Laboratory, University of Illinois

Date: 2024-06-05 | Time: 9:50 AM

Abstract:
Migratable Objects programming model and its embodiment in systems such as Charm++, Adaptive MPI, and Charm4Py, has led to development of some highly scalable, and highly adaptive, parallel applications. We trace the beginnings of its conception in the needs of combinatorial search and logic programming applications in the early days of parallel computing. This led to concepts of message-driven execution (aka task-based models), chares (message-driven objects or a form of Actors) and migratable task-seeds. When we started addressing science and engineering applications, with their iterative structure and spatial decompositions, the Charm++ model evolved to incorporate indexed collections of Chares, and asynchronous collective communication structures over them. The persistence or predictability of load and communication patterns in such applications gave rise to dynamic load balancing capabilities by allowing the chare objects to migrate across nodes, and associated distributed location management. Advent of large multi-core nodes as well as GPGPUs didn’t change the fundamental structure of these programming models, but required simple adoption of new within-node task-handling capabilities. I will review the successes and failures of this model, and reflect on where it stands today. I also look at other current systems that incorporate some of the ideas from this programming model, either by independent discovery, or partially derived from Charm++. Along the way, I will posit some reflections on what makes research ideas succeed or fail, in a field such as parallel programming, which is influenced by subjective preferences and perceived advantages.

Bio:
Professor Laxmikant Kale is the director of the Parallel Programming Laboratory and Research Professor, as well as the Paul and Cynthia Saylor Professor Emeritus of Computer Science at the University of Illinois at Urbana-Champaign.Prof. Kale has been working on various aspects of parallel computing, with a focus on enhancing performance and productivity via adaptive runtime systems, and with the belief that only interdisciplinary research involving multiple CSE and other applications can bring back well-honed abstractions into Computer Science that will have a long-term impact on the state-of-art. His collaborations include the widely used Gordon-Bell award winning (SC 2002) biomolecular simulation program NAMD, and other collaborations on computational cosmology, quantum chemistry, rocket simulation, space-time meshes, and other unstructured mesh applications. He takes pride in his group's success in distributing and supporting software embodying his research ideas, including Charm++, Adaptive MPI and Charm4Py. He and his team won the HPC Challenge award at Supercomputing 2011, for their entry based on Charm++. Prof. Kale is a fellow of the ACM and IEEE, and a winner of the 2012 IEEE Sidney Fernbach award. He was awarded the “HPDC Achievement Award” for 2024.


Resource Consumption & Service Demand Forecasting

Resource Consumption & Service Demand Forecasting

by Theodora Varvarigou

Professor | School of Electrical and Computer Engineering, National Technical University of Athens (NTUA)

Date: 2024-06-06 | Time: 9:00 AM

Abstract:
This presentation is dedicated to exploring various contemporary Resource Consumption & Service Demand Forecasting methodologies. These methodologies include a plethora of state-of-the-art Deep Learning solutions, such as Encoder-Decoder topologies, and Graph Neural Networks. The efficiency of the explored solutions is examined on the basis of two different aspects. The first one is the ability of the various forecasting models to provide accurate Resource Consumption & Service Demand predictions. The second one is the impact of leveraging these predictions on intelligent resource allocation processes, such as Horizontal Autoscaling.

Bio:
Theodora Varvarigou is a professor at the School of Electrical and Computer Engineering of the National Technical University of Athens (NTUA). Between 2019 and 2023, she has served as the Chair of the Board of Directors of Athens Water Supply and Sewerage Company (EYDAP S.A.) which is also listed in the Athens stock exchange. She chaired the Strategy and Innovation Committee, she was a member of the Nominations and Remuneration Committee and she was also a member of the Risk Management Committee. Since 2015, she also serves as a member of the Board of Bodossakis Foundation and since 2021 she is a member of the Steering Committee of the Hellenic Institute of Advanced studies. Since 2020 she has been a member of the European Network of Women in Leadership. Professor Varvarigou graduated from the Electrical Engineering department of the NTUA in 1988 and got her MS degrees in Electrical Engineering (1989) and in Computer Science (1991) from Stanford University. She also received her Ph.D. degree from Stanford University in 1991. Her research is making an impact on cutting-edge technologies, such as data analytics, artificial intelligence, machine learning, Cloud computing, big data technologies, IoT technologies, semantic web, social networking technologies etc. She has published more than 500 papers in leading international journals, conferences and books. She has also participated and co-ordinated more than 60 EC projects. Since 2012-2020 she has been a member of the European Commission’s Expert Group on Cloud Computing, an evaluator of the European Commission’s Research Proposals and she recently acquired a “Making Corporate Boards More Effective” program certificate by the Harvard Business School Executive Education. She began her career in the States, being a principal investigator at AT&T Bell Labs during the period 1991-1994. From 2008-2012, she held the Chair of the postgraduate program “Engineering Economic Systems” of NTUA and during the period 2010-2020 she was a member of the Office of Quality Assurance Unit in NTUA (MODIP NTUA).


The Future of Parallel Code Development: Will AI Lead the Way?

The Future of Parallel Code Development: Will AI Lead the Way?

by Abhinav Bhatele

Associate Professor | Parallel Software and Systems Group, University of Maryland, College Park

Date: 2024-06-07 | Time: 9:00 AM

Abstract:
Artificial intelligence (AI) and large language models (LLMs) specifically, have recently been used to model source code, which has proven to be effective for a variety of software development tasks such as code completion, summarization, translation, and debugging, among others. While the programming languages and software engineering (PL/SE) communities are abuzz with AI-based tools for code development (AIforDev), the application of AIforDev to parallel code has been largely unexplored. Writing, debugging and optimizing parallel code is hard, and the question before the HPC community is -- do AI and LLMs hold the potential for revolutionizing parallel software development. In this talk, I will address the shortcomings of current LLMs when used for parallel code development and how we can close the gap toward building HPC-capable LLMs. I will further highlight emerging areas of research such as improving code modeling capabilities to facilitate various aspects of parallel code development, such as generating correct and efficient parallel code, reasoning about parallel performance, and much more.

Bio:
Abhinav Bhatele is an associate professor in the department of computer science, and director of the Parallel Software and Systems Group at the University of Maryland, College Park. His research interests are broadly in systems and AI, with a focus on parallel computing and distributed AI. He has published research in parallel programming models and runtimes, network design and simulation, applications of machine learning to parallel systems, parallel deep learning, and on analyzing/visualizing, modeling and optimizing the performance of parallel software and systems. Abhinav has received best paper awards at Euro-Par 2009, IPDPS 2013, IPDPS 2016, and PDP 2024, and a best poster award at SC 2023. He was selected as a recipient of the IEEE TCSC Award for Excellence in Scalable Computing (Early Career) in 2014, the LLNL Early and Mid-Career Recognition award in 2018, the NSF CAREER award in 2021, the IEEE TCSC Award for Excellence in Scalable Computing (Middle Career) in 2023, and the UIUC CS Early Career Academic Achievement Alumni Award in 2024.